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Disambiguation of "Bose, Soumitra"

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A rated-clock test method for path delay faults.

, , and . IEEE Trans. Very Large Scale Integr. Syst., 6 (2): 323-331 (1998)

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Detlef Böse

Peter Böse

Eckhard Bose

Georg Böse

Hasso Bose

 

Other publications of authors with the same name

Path delay fault simulation of sequential circuits., , and . IEEE Trans. Very Large Scale Integr. Syst., 1 (4): 453-461 (1993)Automated Modeling of Custom Digital Circuits for Test.. DATE, page 954-961. IEEE Computer Society, (2002)The optimistic update theorem for path delay testing in sequential circuits., , and . J. Electron. Test., 4 (3): 285-290 (1993)PARTHENON: A Parallel Theorem Prover for Non-Horn Clauses., , , and . J. Autom. Reason., 8 (2): 153-181 (1992)A Path Delay Fault Simulator for Sequential Circuits., , and . VLSI Design, page 269-274. IEEE Computer Society, (1993)Algorithms for Switch Level Delay Fault Simulation., , and . ITC, page 982-991. IEEE Computer Society, (1997)Concurrent Fault Simulation of Logic Gates and Memory Blocks on Message Passing Multicomputers., and . DAC, page 332-335. IEEE Computer Society Press, (1992)A rated-clock test method for path delay faults., , and . IEEE Trans. Very Large Scale Integr. Syst., 6 (2): 323-331 (1998)Verifying pipelined hardware using symbolic logic simulation., and . ICCD, page 217-221. IEEE, (1989)Extraction of Schematic Array Models for Memory Circuits., and . DATE, page 570-577. IEEE Computer Society, (2004)