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A Platform for Placement of Analog Integrated Circuits Using Satisfiability Modulo Theories., , , , and . Journal of Circuits, Systems, and Computers, 25 (5): 1650047:1-1650047:31 (2016)Process variability-induced NoC link failure: A probabilistic model., , and . Microelectron. J., 46 (3): 248-257 (2015)On kernel acceleration of electromagnetic solvers via hardware emulation., , , , , , , , and . Comput. Electr. Eng., (2015)MPC-On-Chip: An Embedded GPC Coprocessor for Automotive Active Suspension Systems., , and . IEEE Embed. Syst. Lett., 2 (2): 31-34 (2010)On Error Injection for NoC Platforms: A UVM-Based Generic Verification Environment., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (5): 1137-1150 (2020)Power optimization for application-specific networks-on-chips: A topology-based approach., , , and . Microprocess. Microsystems, 33 (5-6): 343-355 (2009)A robust stack folding approach for Java processors: an operand extraction-based algorithm., , and . J. Syst. Archit., 47 (8): 697-726 (2001)Analog layout constraints resolution and shape function generation using Satisfiability Modulo Theories., , , , and . DTIS, page 1-6. IEEE, (2015)Digital ASIC Implementation of RISC-V: OpenLane and Commercial Approaches in Comparison., , , and . MWSCAS, page 498-502. IEEE, (2021)Adaptation of PAM4 Serial Link Transceiver Equalizers using Eye Diagram Monitoring., , , , and . ICM, page 148-152. IEEE, (2021)