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Disambiguation of "Casper, Bryan"

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A 0.5-to-0.75V, 3-to-8 Gbps/lane, 385-to-790 fJ/b, bi-directional, quad-lane forwarded-clock transceiver in 22nm CMOS.

, , , , , , and . VLSIC, page 346-. IEEE, (2015)

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Agnes Bryan

Corinna Susanne Bryan

Doreen Bryant

Amanda Cordelia Bryant-Friedrich

Bryan Hudson

 

Other publications of authors with the same name

A 42.2Gb/s 4.3pJ/b 60GHz Digital Transmitter with 12b/Symbol Polarization MIMO., , , , , , and . ISSCC, page 172-174. IEEE, (2019)A Scalable 0.128-1 Tb/s, 0.8-2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 48 (12): 3229-3242 (2013)A 60-GHz Transceiver and Baseband With Polarization MIMO in 28-nm CMOS., , , , , , , , , and . IEEE J. Solid State Circuits, 53 (12): 3613-3627 (2018)A Scalable 5-15 Gbps, 14-75 mW Low-Power I/O Transceiver in 65 nm CMOS., , , , , , , and . IEEE J. Solid State Circuits, 43 (4): 1010-1019 (2008)A 4-32 Gb/s Bidirectional Link With 3-Tap FFE/6-Tap DFE and Collaborative CDR in 22 nm CMOS., , , , , , , , , and 6 other author(s). IEEE J. Solid State Circuits, 49 (12): 3079-3090 (2014)Strong injection locking of low-Q LC oscillators., , , , , , , and . CICC, page 699-702. IEEE, (2008)An on-die all-digital delay measurement circuit with 250fs accuracy., , and . VLSIC, page 98-99. IEEE, (2012)26.2 A 205mW 32Gb/s 3-Tap FFE/6-tap DFE bidirectional serial link in 22nm CMOS., , , , , , , , , and 6 other author(s). ISSCC, page 440-441. IEEE, (2014)A 20Gb/s Forwarded Clock Transceiver in 90nm CMOS B., , , , , , , and . ISSCC, page 263-272. IEEE, (2006)An 8-Gb/s simultaneous bidirectional link with on-die waveform capture., , , , and . IEEE J. Solid State Circuits, 38 (12): 2111-2120 (2003)