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Integrated Circuit with Memristor Emulator Array and Neuron Circuits for Biologically Inspired Neuromorphic Pattern Recognition.

, , , , , , and . J. Circuits Syst. Comput., 26 (11): 1750183:1-1750183:19 (2017)

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Integration of Double Barrier Memristor Die with Neuron ASIC for Neuromorphic Hardware Learning., , , , , , , and . ISCAS, page 1-5. IEEE, (2018)New methods for handling binary constraints., , , and . Allerton, page 1074-1080. IEEE, (2016)L2-constrained Softmax Loss for Discriminative Face Verification., , and . CoRR, (2017)Dynamic Bayesian network based prediction of performance parameters in cloud computing., and . Int. J. Grid Util. Comput., 14 (4): 368-381 (2023)Deep convolutional neural networks in the face of caricature., , , , , , , and . Nat. Mach. Intell., 1 (11): 522-529 (2019)A sampling theorem for fractional S-transform with error estimation., , and . Digit. Signal Process., (2019)Video error concealment through 3-D face model., , and . Multim. Tools Appl., 76 (22): 23931-23955 (2017)Performance Evaluation of Indian Technical Institutions Using PROMETHEE-GAIA Approach., and . Informatics Educ., 14 (1): 105-127 (2015)The identities of n-dimensional s-transform and applications., , and . Multim. Tools Appl., 81 (12): 16661-16677 (2022)An Automatic System for Unconstrained Video-Based Face Recognition., , , , , and . IEEE Trans. Biom. Behav. Identity Sci., 2 (3): 194-209 (2020)