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Disambiguation of "Ueno, Rei"

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Highly Efficient GF(28) Inversion Circuit Based on Redundant GF Arithmetic and Its Application to AES Design.

, , , , and . CHES, volume 9293 of Lecture Notes in Computer Science, page 63-80. Springer, (2015)

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Keiko Ueno

Chieko Ueno

Marek Rei

Rei Sugaya

Rei Thiessen

 

Other publications of authors with the same name

Toward More Efficient DPA-Resistant AES Hardware Architecture Based on Threshold Implementation., , and . COSADE, volume 10348 of Lecture Notes in Computer Science, page 50-64. Springer, (2017)Rejection Sampling Schemes for Extracting Uniform Distribution from Biased PUFs., , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020 (4): 86-128 (2020)Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-., , , , , , , , , and 9 other author(s). ICCAD, page 141:1-141:6. IEEE, (2020)Side-Channel Analysis Against SecOC-Compliant AES-CMAC., , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (10): 3772-3776 (October 2023)High Throughput/Gate AES Hardware Architectures Based on Datapath Compression., , , , , , , , , and . IEEE Trans. Computers, 69 (4): 534-548 (2020)SCARF: A Low-Latency Block Cipher for Secure Cache-Randomization., , , , , and . IACR Cryptol. ePrint Arch., (2022)Fallen Sanctuary: A Higher-Order and Leakage-Resilient Rekeying Scheme., , , and . IACR Cryptol. ePrint Arch., (2023)Bypassing Isolated Execution on RISC-V using Side-Channel-Assisted Fault-Injection and Its Countermeasure., , , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022 (1): 28-68 (2022)Efficient Modular Polynomial Multiplier for NTT Accelerator of Crystals-Kyber., , and . DSD, page 528-533. IEEE, (2022)An Efficient Approach to Verifying Galois-Field Arithmetic Circuits of Higher Degrees and Its Application to ECC Decoders., , , and . ISMVL, page 144-149. IEEE Computer Society, (2014)