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Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion.

, , , and . ISCAS (4), page 838-841. IEEE, (2001)

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Ultra low voltage static carry generate circuit.. ISCAS, page 1476-1479. IEEE, (2010)Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers., , , , and . ISCAS (1), page 345-348. IEEE, (2003)Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion., , , and . ISCAS (4), page 838-841. IEEE, (2001)Extreme low-voltage floating-gate CMOS transconductance amplifier., , , , and . ISCAS (1), page 37-40. IEEE, (2001)A new self-sensing approach for actuation and readout of piezoelectric resonating sensor., , and . ICNSC, page 232-235. IEEE, (2015)New SRAM design using body bias technique for ultra low power applications., , , , and . ISQED, page 468-471. IEEE, (2010)Clocked semi-floating-gate pseudo differential pair for low-voltage analog design., and . ECCTD, page 441-444. IEEE, (2009)Cascade of Current-Starved Pseudo Floating-Gate inverters., and . ICECS, page 1030-1033. IEEE, (2008)Clocked semi-floating-gate ultra low-voltage current mirror., , and . ICECS, page 1038-1041. IEEE, (2008)Low-voltage and high-speed CMOS circuit design with low-power mode., and . ICECS, page 57-60. IEEE, (2015)