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State-reuse Test Generation for Progressive Random Access Scan: Solution to Test Power, Application Time and Data Size.

, and . Asian Test Symposium, page 272-277. IEEE Computer Society, (2005)

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An Algorithm to Test Rams for Physical Neighborhood Pattern Sensitive Faults., and . ITC, page 675-684. IEEE Computer Society, (1991)Critical-Path-Aware X-Filling for Effective IR-Drop Reduction in At-Speed Scan Testing., , , , , and . DAC, page 527-532. IEEE, (2007)Privacy Assurances in Multiple Data-Aggregation Transactions., , and . ICISC, volume 8565 of Lecture Notes in Computer Science, page 3-19. Springer, (2013)Hypergraph Coloring and Reconfigured RAM Testing., and . IEEE Trans. Computers, 43 (6): 725-736 (1994)Modeling Detection Latency with Collaborative Mobile Sensing Architecture., , and . IEEE Trans. Computers, 58 (5): 692-705 (2009)A Data Compression Technique for Built-In Self-Test., , and . IEEE Trans. Computers, 37 (9): 1151-1156 (1988)Correction: IEEE Transactions on Computers 38(2): 320 (1989).Instruction-based delay fault self-testing of pipelined processor cores., , , and . ISCAS (6), page 5686-5689. IEEE, (2005)Efficient Test Set Modification for Capture Power Reduction., , , , , , and . J. Low Power Electron., 1 (3): 319-330 (2005)Optimal Test Scheduling Formulation under Power Constraints with Dynamic Voltage and Frequency Scaling., and . J. Electron. Test., 30 (5): 569-580 (2014)An Algorithm for Diagnosing Transistor Shorts Using Gate-level Simulation., , , , and . IPSJ Trans. Syst. LSI Des. Methodol., (2009)