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Disambiguation of "Blott, Michaela"

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On How to Improve FPGA-Based Systems Design Productivity via SDAccel.

, , , , , and . IPDPS Workshops, page 247-252. IEEE Computer Society, (2016)

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Irene Blottner

Steffen Blottner

Stefan Blöttner

Annemarie Blottner

Gerhard Blottner

 

Other publications of authors with the same name

DarwiNN: efficient distributed neuroevolution under communication constraints., , , and . GECCO Companion, page 141-142. ACM, (2020)Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs., , , , , , , , , and 1 other author(s). CoRR, (2018)LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applications., , , and . FPL, page 291-297. IEEE, (2020)FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks., , , , , , , and . ACM Trans. Reconfigurable Technol. Syst., 11 (3): 16:1-16:23 (2018)RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures., , , , and . IEEE Micro, 42 (6): 125-133 (2022)QuTiBench: Benchmarking Neural Networks on Heterogeneous Hardware., , , and . ACM J. Emerg. Technol. Comput. Syst., 15 (4): 37:1-37:38 (2019)On the RTL Implementation of FINN Matrix Vector Compute Unit., , , , and . CoRR, (2022)Applications and Techniques for Fast Machine Learning in Science., , , , , , , , , and 37 other author(s). Frontiers Big Data, (2022)Evaluating Theoretical Baselines for ML Benchmarking Across Different Accelerators., , , and . IEEE Des. Test, 39 (3): 28-36 (2022)Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring., , and . LCTES, page 129-136. ACM, (2009)