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TSV metrology and inspection challenges.

R. Alapati, Y. Travaly, J. Olmen, R. Teixeira, J. Vaes, M. van Cauwenbergh, A. Jourdain, G. Verbinnen, G. Marcuccilli, G. Florence, S. Wolfling, C. Pelissier, H. Zhang, J. Sinha, A. Machura, and I. Malik. 3DIC, page 1-4. IEEE, (2009)

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Youssef Shawky Youssef Sherief

Youssef Chahadi

Youssef Dennaoui

Adel Youssef

Youssef Azzi

Other publications of authors with the same name

Processing assessment and adhesion evaluation of copper through-silicon vias (TSVs) for three-dimensional stacked-integrated circuit (3D-SIC) architectures.Y. Yang, R. Labie, F. Ling, C. Zhao, A. Radisic, J. Olmen, Y. Travaly, B. Verlinden, and I. Wolf. Microelectron. Reliab., 50 (9-11): 1636-1640 (2010)Impact of interconnect resistance increase on system performance of low power and high performance designs.M. Bamal, Y. Travaly, W. Zhang, M. Stucchi, and K. Maex. SLIP, page 85-90. ACM, (2006)Design Issues and Considerations for Low-Cost 3-D TSV IC Technology.G. der Plas, P. Limaye, I. Loi, A. Mercha, H. Oprins, C. Torregiani, S. Thijs, D. Linten, M. Stucchi, G. Katti and 27 other author(s). IEEE J. Solid State Circuits, 46 (1): 293-307 (2011)300mm wafer thinning and backside passivation compatibility with temporary wafer bonding for 3D stacked IC applications.A. Jourdain, T. Buisson, A. Phommahaxay, M. Privett, D. Wallace, S. Sood, P. Bisson, E. Beyne, Y. Travaly, and B. Swinnen. 3DIC, page 1-4. IEEE, (2010)A novel concept for ultra-low capacitance via-last TSV.Y. Civale, M. Gonzalez, D. Tezcan, Y. Travaly, P. Soussan, and E. Beyne. 3DIC, page 1-4. IEEE, (2010)In-tier diagnosis of power domains in 3D TSV ICs.Y. Araga, M. Nagata, G. der Plas, J. Kim, N. Minas, P. Marchal, Y. Travaly, M. Libois, A. Manna, W. Zhang and 1 other author(s). 3DIC, page 1-6. IEEE, (2011)TSV metrology and inspection challenges.R. Alapati, Y. Travaly, J. Olmen, R. Teixeira, J. Vaes, M. van Cauwenbergh, A. Jourdain, G. Verbinnen, G. Marcuccilli, G. Florence and 6 other author(s). 3DIC, page 1-4. IEEE, (2009)Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions.G. der Plas, S. Thijs, D. Linten, G. Katti, P. Limaye, A. Mercha, M. Stucchi, H. Oprins, B. Vandevelde, N. Minas and 8 other author(s). CICC, page 1-4. IEEE, (2010)Design issues and considerations for low-cost 3D TSV IC technology.G. der Plas, P. Limaye, A. Mercha, H. Oprins, C. Torregiani, S. Thijs, D. Linten, M. Stucchi, G. Katti, D. Velenis and 24 other author(s). ISSCC, page 148-149. IEEE, (2010)Die stacking using 3D-wafer level packaging copper/polymer through-si via technology and Cu/Sn interconnect bumping.Y. Civale, D. Tezcan, H. Philipsen, P. Jaenen, R. Agarwal, F. Duval, P. Soussan, Y. Travaly, and E. Beyne. 3DIC, page 1-4. IEEE, (2009)

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Disambiguation of "Travaly, Youssef"

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TSV metrology and inspection challenges.

Please choose a person to relate this publication to

Youssef Shawky Youssef Sherief

Youssef Chahadi

Youssef Dennaoui

Adel Youssef

Youssef Azzi

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Travaly, Youssef"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML TSV metrology and inspection challenges.

Please choose a person to relate this publication to

Youssef Shawky Youssef Sherief

Youssef Chahadi

Youssef Dennaoui

Adel Youssef

Youssef Azzi

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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TSV metrology and inspection challenges.