Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating.

H. Tamura, K. Kato, T. Ishizu, T. Onuki, W. Uesugi, T. Ohmaru, K. Ohshima, H. Kobayashi, S. Yoneda, A. Isobe, N. Tsutsui, S. Hondo, Y. Suzuki, Y. Okazaki, T. Atsumi, Y. Shionoiri, Y. Maehashi, G. Goto, M. Fujita, J. Myers, P. Korpinen, J. Koyama, Y. Yamamoto, and S. Yamazaki. COOL Chips, page 1-3. IEEE Computer Society, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Ferenc Kató

Yumiko Kato

Keiichi Kato

Kiyoshi Nishigami

Kiyoshi Mineshige

Other publications of authors with the same name

Employing Symmetric Subsets for Identifying Asymmetry of Human Skulls.T. Takeda, S. Ishikawa, and K. Kato. MVA, page 338-341. (1994)Automatic Spinal Deformity Detection by Two Characteristic Axes.H. Ueno, S. Ishikawa, Y. Otsuka, and K. Kato. MVA, page 47-50. (1996)A Method of Resolving an Entangled Cord.Y. Nogami, S. Ishikawa, and K. Kato. MVA, page 55-58. (1996)A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs.T. Ishizu, Y. Yakubo, K. Furutani, A. Isobe, M. Fujita, T. Atsumi, Y. Ando, T. Murakawa, K. Kato, M. Fujita and 1 other author(s). VLSI Circuits, page 48-. IEEE, (2019)Numerical computation of two-loop box diagrams with masses.F. Yuasa, E. de Doncker, N. Hamaguchi, T. Ishikawa, K. Kato, Y. Kurihara, J. Fujimoto, and Y. Shimizu. Comput. Phys. Commun., 183 (10): 2136-2144 (2012)GR@PPA 2.7 event generator for pp/pp collisions.S. Tsuno, T. Kaneko, Y. Kurihara, S. Odaka, and K. Kato. Comput. Phys. Commun., 175 (10): 665-677 (2006)Associating an image by network constraint analysis.S. Ishikawa, and K. Kato. ICPR (1), page 730-733. IEEE, (1992)Regularization with numerical extrapolation for finite and UV-divergent multi-loop integrals.E. de Doncker, F. Yuasa, K. Kato, T. Ishikawa, J. Kapenga, and O. Olagbemi. Comput. Phys. Commun., (2018)A 20ns-write 45ns-read and 1014-cycle endurance memory module composed of 60nm crystalline oxide semiconductor transistors.S. Maeda, S. Ohshita, K. Furutani, Y. Yakubo, T. Ishizu, T. Atsumi, Y. Ando, D. Matsubayashi, K. Kato, T. Okuda and 2 other author(s). ISSCC, page 484-486. IEEE, (2018)Seasonal and size anomalies in the Japanese stock market{. Kato. Salt Lake City, (1985)

BibSonomy

Disambiguation of "Kato, Kiyoshi"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating.

Please choose a person to relate this publication to

Ferenc Kató

Yumiko Kato

Keiichi Kato

Kiyoshi Nishigami

Kiyoshi Mineshige

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Kato, Kiyoshi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating.

Please choose a person to relate this publication to

Ferenc Kató

Yumiko Kato

Keiichi Kato

Kiyoshi Nishigami

Kiyoshi Mineshige

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating.