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Disambiguation of "Isobe, Atsuo"

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Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating.

, , , , , , , , , , , , , , , , , , , , , , , and . COOL Chips, page 1-3. IEEE Computer Society, (2014)

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Hiroyuki Isobe

 

Other publications of authors with the same name

Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium-Gallium-Zinc Oxide FET Integrated With 65-nm Si CMOS., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 52 (4): 925-932 (2017)A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor., , , , , , , , , and 8 other author(s). VLSIC, page 1-2. IEEE, (2014)Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating., , , , , , , , , and 14 other author(s). COOL Chips, page 1-3. IEEE Computer Society, (2014)Embedded SRAM and Cortex-M0 Core Using a 60-nm Crystalline Oxide Semiconductor., , , , , , , , , and 5 other author(s). IEEE Micro, 34 (6): 42-53 (2014)Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS., , , , , , , , , and 6 other author(s). VLSI Circuits, page 1-2. IEEE, (2016)Nonvolatile Memory With Extremely Low-Leakage Indium-Gallium-Zinc-Oxide Thin-Film Transistor., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 47 (9): 2258-2265 (2012)A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs., , , , , , , , , and 1 other author(s). VLSI Circuits, page 48-. IEEE, (2019)