( en | de | ru )

 

Disambiguation of "Ortega-Cisneros, Susana"

Author of the publication

copydeleteadd this publication to your clipboard
Editorial.

, , , and . Computación y Sistemas, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Mario Cisneros

Alfonso Ortega

Alcides Ortega

Felipe Ortega

José Ortega

 

Other publications of authors with the same name

Discontinuous output regulation for a DC-to-AC boost converter., , , and . CCE, page 1-6. IEEE, (2012)A Hardware Implementation of a Unit for Geometric Algebra Operations With Parallel Memory Arrays (Abstract Only)., , , , and . FPGA, page 272. ACM, (2015)A Novel Framework for Fast Feature Selection Based on Multi-Stage Correlation Measures., , , , and . Mach. Learn. Knowl. Extr., 4 (1): 131-149 (2022)Real-Time Database Systems - Fundamentals, Architectures and Applications, , , and . Springer Briefs in Computer Science Springer, (2024)FPGA implementation of a synchronous and self-timed neuroprocessor., , and . ReConFig, IEEE Computer Society, (2005)Characterization technique to implement self-timed cells for VLSI design blocks., , , , and . CCE, page 1-6. IEEE, (2014)Artificial Intelligence-Based Referral System for Patients With Diabetic Retinopathy., , , , , and . Computer, 53 (10): 77-87 (2020)Design and Implementation of an NoC-Based Convolution Architecture With GEMM and Systolic Arrays.. IEEE Embed. Syst. Lett., 16 (1): 49-52 (March 2024)Discrete-time sensorless control of permanent magnet synchronous motors., , , and . CCE, page 1-6. IEEE, (2011)Implementation of 8-Channel Pulse Width Modulation with AXI4-Lite Interface., , , , , and . CCE, page 1-5. IEEE, (2022)