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Disambiguation of "Campbell, Keith A."

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Debugging and verifying SoC designs through effective cross-layer hardware-software co-simulation.

, , , , , and . DAC, page 7:1-7:6. ACM, (2016)

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James Campbell

James Campbell

Iain Campbell

Geneviève Campbell

Brian Campbell

 

Other publications of authors with the same name

Debugging and verifying SoC designs through effective cross-layer hardware-software co-simulation., , , , , and . DAC, page 7:1-7:6. ACM, (2016)Hybrid quick error detection (H-QED): accelerator validation and debug using high-level synthesis principles., , , and . DAC, page 53:1-53:6. ACM, (2015)Robust and reliable hardware accelerator design through high-level synthesis. University of Illinois Urbana-Champaign, USA, (2017)Cost-Effective Error Detection Through Mersenne Modulo Shadow Datapaths., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (6): 1056-1069 (2019)Low-cost hardware architectures for mersenne modulo functional units., , and . ASP-DAC, page 599-604. IEEE, (2018)Hybrid Quick Error Detection: Validation and Debug of SoCs Through High-Level Synthesis., , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (7): 1345-1358 (2019)High-level Synthesis for Low-power Design., , , and . IPSJ Trans. Syst. LSI Des. Methodol., (2015)High-level synthesis of error detecting cores through low-cost modulo-3 shadow datapaths., , , and . DAC, page 161:1-161:6. ACM, (2015)Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights., , , , , , , , , and 6 other author(s). ICCD, page 593-596. IEEE Computer Society, (2017)