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Techniques for mapping deep neural network frameworks to programmable accelerators.. Stanford University, USA, (2021)Impact of FPGA architecture on resource sharing in high-level synthesis., , , , , , and . FPGA, page 111-114. ACM, (2012)Plasticine: A Reconfigurable Architecture For Parallel Paterns., , , , , , , , and . ISCA, page 389-402. ACM, (2017)Importance Sampling over Sets: A New Probabilistic Inference Scheme., and . UAI, page 355-364. AUAI Press, (2015)Omnivore: An Optimizer for Multi-device Deep Learning on CPUs and GPUs, , , , and . (2016)cite arxiv:1606.04487.Omnivore: An Optimizer for Multi-device Deep Learning on CPUs and GPUs., , , and . CoRR, (2016)TensorFlow to Cloud FPGAs: Tradeoffs for Accelerating Deep Neural Networks., and . FPL, page 360-366. IEEE, (2019)Plasticine: A Reconfigurable Accelerator for Parallel Patterns., , , , , , , , and . IEEE Micro, 38 (3): 20-31 (2018)Profiling-driven multi-cycling in FPGA high-level synthesis., , , , , and . DATE, page 31-36. ACM, (2015)Asynchrony begets momentum, with an application to deep learning., , , and . Allerton, page 997-1004. IEEE, (2016)