( en | de | ru )

 

Disambiguation of "Deval, Philippe"

Author of the publication

copydeleteadd this publication to your clipboard
CARIOCA-0.25 Sigma-Delta CMOS fast binary front-end for sensor interface using a novel current-mode feedback technique.

, , , , , , and . ISCAS (1), page 360-363. IEEE, (2001)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Gabriele Devallet

Benoît Philippe

Philippe Schafhausen

Philippe Kersting

Philippe Zysset

 

Other publications of authors with the same name

Lov-Voltage (3.3V) / Low-Power (100muW), 2MHZ CMOS Comparator for 12-BIT ADCS., , and . ISCAS, page 501-504. IEEE, (1994)Incremental Delta-Sigma Structures for DC Measurement: an Overview., , , , and . CICC, page 41-48. IEEE, (2006)SC Circuits: The State of the Art Compared to SI Techniques., , and . ISCAS, page 1231-1234. IEEE, (1993)A low-power 22-bit incremental ADC with 4 ppm INL, 2 ppm gain error and 2 μV DC offset., , , , , , , and . ESSCIRC, page 443-446. IEEE, (2005)A low-power 22-bit incremental ADC., , , , , , and . IEEE J. Solid State Circuits, 41 (7): 1562-1571 (2006)A low-power 1-GHz super-regenerative transceiver with time-shared PLL control., , , , and . IEEE J. Solid State Circuits, 36 (7): 1025-1031 (2001)A 2-V 600-μA 1-GHz BiCMOS super-regenerative receiver for ISM applications., , , , , and . IEEE J. Solid State Circuits, 33 (12): 2186-2196 (1998)A high-efficiency CMOS voltage doubler., , and . IEEE J. Solid State Circuits, 33 (3): 410-416 (1998)CARIOCA-0.25 Sigma-Delta CMOS fast binary front-end for sensor interface using a novel current-mode feedback technique., , , , , , and . ISCAS (1), page 360-363. IEEE, (2001)