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Temperature-Gradient-Based Burn-In and Test Scheduling for 3-D Stacked ICs., , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (12): 2992-3005 (2015)Model validation for embedded systems using formal method-aided simulation., , and . IET Comput. Digit. Tech., 2 (6): 413-433 (2008)Partitioned and overhead-aware scheduling of mixed-criticality real-time systems., , , and . ASP-DAC, page 39-44. ACM, (2019)On Reachability in Parameterized Phaser Programs., , , , and . TACAS (1), volume 11427 of Lecture Notes in Computer Science, page 299-315. Springer, (2019)Synthesis of VHDL concurrent processes., , , and . EURO-DAC, page 540-545. IEEE Computer Society, (1994)A Reconfigurable Framework for Performance Enhancement With Dynamic FPGA Configuration Prefetching., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (1): 100-113 (2016)Temperature-gradient based test scheduling for 3D stacked ICs., , and . ICECS, page 405-408. IEEE, (2013)Stability-aware analysis and design of embedded control systems., , , and . EMSOFT, page 23:1-23:10. IEEE, (2013)Scheduling optimization with partitioning for mixed-criticality systems., , , and . J. Syst. Archit., (2019)Systematic detection of memory related performance bottlenecks in GPGPU programs., , , and . J. Syst. Archit., (2016)