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Disambiguation of "Park, Jong Mun"

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Analysis of hot carrier effects in a 0.35 µm high voltage n-channel LDMOS transistor.

, , , and . Microelectron. Reliab., 47 (9-11): 1439-1443 (2007)

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Mun Jong Su

Jong-Mi Park

Hyun-Jong Park

Sey Jong Park

Jong-Oh Park

 

Other publications of authors with the same name

Evolution of a CMOS Based Lateral High Voltage Technology Concept., , and . Microelectron. J., 37 (3): 243-248 (2006)Optical sensor process variability in a 0.18 μm high voltage CMOS technology., , and . PATMOS, page 1-6. IEEE, (2017)Interface traps density-of-states as a vital component for hot-carrier degradation modeling., , , , , , , , , and 4 other author(s). Microelectron. Reliab., 50 (9-11): 1267-1272 (2010)An analytical approach for physical modeling of hot-carrier induced degradation., , , , , , , , and . Microelectron. Reliab., 51 (9-11): 1525-1529 (2011)Analysis of hot carrier effects in a 0.35 µm high voltage n-channel LDMOS transistor., , , and . Microelectron. Reliab., 47 (9-11): 1439-1443 (2007)Hot-carrier reliability in high-voltage lateral double-diffused MOS transistors., , , , , , and . IET Circuits Devices Syst., 2 (3): 347-353 (2008)Improving SiC lateral DMOSFET reliability under high field stress., , , , and . Microelectron. Reliab., 43 (9-11): 1889-1894 (2003)High-voltage lateral trench gate SOI-LDMOSFETs., , and . Microelectron. J., 35 (3): 299-304 (2004)A method for generating structurally aligned grids for semiconductor device simulation., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 24 (10): 1485-1491 (2005)