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Area-efficient transient power-rail electrostatic discharge clamp circuit with mis-triggering immunity in a 65-nm CMOS process.

Y. Wang, G. Lu, H. Guo, J. Cao, S. Jia, and X. Zhang. Sci. China Inf. Sci., 59 (4): 042407:1-042407:9 (2016)

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Jia Song

Jia Jia

Song Song

Jia Xu

Other publications of authors with the same name

A novel fault-tolerant control strategy for Near Space Hypersonic Vehicles via Least Squares Support Vector Machine and Backstepping method.J. Song, J. Lin, and E. Yang. ICAC, page 174-182. IEEE, (2016)Delay-locked loop based clock and data recovery with wide operating range and low jitter in a 65-nm CMOS process.Y. Wang, Y. Liu, S. Jia, and X. Zhang. I. J. Circuit Theory and Applications, 45 (6): 851-858 (2017)A 10b, 0.7ps resolution coarse-fine time-to-digital converter in 65nm CMOS using a time residue amplifier.J. Chen, S. Jia, and Y. Wang. ASICON, page 1-4. IEEE, (2015)Study on the Rainfall Interpolation Algorithm of Distributed Hydrological Model Based on RS.X. Yang, Y. Liang, and S. Jia. CCTA (2), volume 345 of IFIP Advances in Information and Communication Technology, page 700-705. Springer, (2010)The Application of Three-Dimensional Visualization Technology in Village Information Service Platform.X. Yang, Y. Liang, and S. Jia. CCTA (3), volume 346 of IFIP Advances in Information and Communication Technology, page 41-45. Springer, (2010)A Short-Time Three-Phase Single-Rail Precharge Logic against Differential Power Analysis.W. Tang, S. Jia, and Y. Wang. IEICE Trans. Electron., 99-C (8): 956-962 (2016)Design of novel, semi-transparent flip-flops (STFF) for high speed and low power application.X. Li, S. Jia, L. Liu, Y. Wang, and G. Zhang. Sci. China Inf. Sci., 55 (10): 2390-2398 (2012)Design of a novel ternary SRAM sense amplifier using CNFET.Z. Liu, T. Pan, S. Jia, and U. Wang. ASICON, page 207-210. IEEE, (2017)Research Notes: User Identification Model Based on Mouse Behaviors.B. Wang, H. Liu, K. Wang, G. Xin, and J. Song. International Journal of Software Engineering and Knowledge Engineering, 28 (2): 175-192 (2018)A novel low-power and high-speed dual-modulus prescaler based on extended true single-phase clock logic.S. Jia, Z. Wang, Z. Li, and Y. Wang. ISCAS, page 2751-2754. IEEE, (2016)

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Disambiguation of "Jia, Song"

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Area-efficient transient power-rail electrostatic discharge clamp circuit with mis-triggering immunity in a 65-nm CMOS process.

Please choose a person to relate this publication to

Jia Song

Jia Jia

Song Song

Song Song

Jia Xu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Jia, Song"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Area-efficient transient power-rail electrostatic discharge clamp circuit with mis-triggering immunity in a 65-nm CMOS process.

Please choose a person to relate this publication to

Jia Song

Jia Jia

Song Song

Song Song

Jia Xu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Area-efficient transient power-rail electrostatic discharge clamp circuit with mis-triggering immunity in a 65-nm CMOS process.