Author of the publication

Low-Power Wideband Analog Channelization Filter Bank Using Passive Polyphase-FFT Techniques.

, and . IEEE J. Solid State Circuits, 52 (7): 1753-1767 (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A throughput-agnostic 11.9-13.6GOPS/mW multi-signal classification SoC for cognitive radios in 40nm CMOS., , , , , , and . VLSIC, page 150-. IEEE, (2015)A novel noise optimization design technique for radio frequency low noise amplifiers., , and . ISCAS (1), page 209-212. IEEE, (2003)Analysis and gain design of an integrated quadrature mixer with improved noise and image rejection., and . ISCAS (4), page 786-789. IEEE, (2001)Capacitor bank design for wide tuning range LC VCOs: 850MHz-7.1GHz (157%)., and . ISCAS, page 1975-1978. IEEE, (2010)Frequency-Hopped Quadrature Frequency Synthesizer in 0.13-mum Technology., , and . IEEE J. Solid State Circuits, 46 (9): 2021-2032 (2011)A Multi-Mode DC-DC Converter for Direct Battery-to-Silicon High Tension Power Delivery in 65nm CMOS., and . CICC, page 1-4. IEEE, (2019)A CMOS high efficiency +22 dBm linear power amplifier., and . CICC, page 557-560. IEEE, (2004)On the selection of on-chip inductors for the optimal VCO design., , and . CICC, page 277-280. IEEE, (2004)High linearity PVT tolerant 100MS/s rail-to-rail ADC driver with built-in sampler in 65nm CMOS., and . CICC, page 1-4. IEEE, (2014)A unified framework for capacitive series-parallel DC-DC converter design., and . CICC, page 1-8. IEEE, (2014)