Author of the publication

Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor.

, , , , , , and . IEEE Trans. Computers, 54 (8): 998-1012 (2005)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Uncovering hidden loop level parallelism in sequential applications., , , and . HPCA, page 290-301. IEEE Computer Society, (2008)Embracing heterogeneity with dynamic core boosting., and . Conf. Computing Frontiers, page 10:1-10:10. ACM, (2014)Sentinel Scheduling for VLIW and Superscalar Processors., , , , , , and . ACM Trans. Comput. Syst., 11 (4): 376-408 (1993)preliminary version: ASPLOS 1992: 238-247.Increasing hardware efficiency with multifunction loop accelerators., , , and . CODES+ISSS, page 276-281. ACM, (2006)Tolerating First Level Memory Access Latency in High-Performance Systems., , and . ICPP (1), page 36-43. CRC Press, (1992)The Effect of Compiler Optimizations on Available Parallelism in Scalar Programs., , , , and . ICPP (2), page 142-145. CRC Press, (1991)Gadara: Dynamic Deadlock Avoidance for Multithreaded Programs., , , , and . OSDI, page 281-294. USENIX Association, (2008)Low-cost prediction-based fault protection strategy., , , and . CGO, page 30-42. ACM, (2020)StageNet: A Reconfigurable Fabric for Constructing Dependable CMPs., , , and . IEEE Trans. Computers, 60 (1): 5-19 (2011)Cost-efficient soft error protection for embedded microprocessors., , , and . CASES, page 421-431. ACM, (2006)