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Disambiguation of "Ye, Yibin"

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Power Consumption in XOR-Based Circuits.

, , and . ASP-DAC, page 299-302. IEEE Computer Society, (1999)

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Yibin Deng

Yibin Li

Yibin Wang

Ying Ye

Ye Hu

 

Other publications of authors with the same name

Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications., , , , and . DAC, page 430-435. ACM Press, (1999)Incremental-Based Extreme Learning Machine Algorithms for Time-Variant Neural Networks., , and . ICIC (1), volume 6215 of Lecture Notes in Computer Science, page 9-16. Springer, (2010)Combined channel assignment and network coded opportunistic routing in cognitive radio networks., , , , and . Comput. Electr. Eng., (2016)Analysis of dual-VT SRAM cells with full-swing single-ended bit line sensing for on-chip cache., , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 10 (2): 91-95 (2002)ELM-based Algorithms for Nonstationary Volterra System Identification., , and . WIRN, volume 234 of Frontiers in Artificial Intelligence and Applications, page 77-84. IOS Press, (2011)Online sequential extreme learning machine in nonstationary environments., , and . Neurocomputing, (2013)Dynamic noise analysis in precharge-evaluate circuits., , , , and . DAC, page 243. ACM, (2000)A Graph-Based Synthesis Algorithm for AND/XOR Networks., and . DAC, page 107-112. ACM Press, (1997)Design and optimization of dual-threshold circuits for low-voltage low-power applications., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 7 (1): 16-24 (1999)Skewed Repeater Bus: A Low-Power Scheme for On-Chip Buses., , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 55-I (7): 1904-1910 (2008)