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A novel BRAM content accessing and processing method based on FPGA configuration bitstream.

J. Gomez-Cornejo, A. Zuloaga, I. Villalta, J. Ser, U. Kretzschmar, and J. Lázaro. Microprocess. Microsystems, (2017)

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Software Workbench for Movement Estimation based on Optical Flow Computation.J. Martín, A. Zuloaga, and J. Cruzado. VIIP, page 517-522. ACTA Press, (2001)Doppler Location Algorithm for Wireless Sensor Networks.J. Arias, J. Lázaro, A. Zuloaga, and J. Jimenez. International Conference on Wireless Networks, page 509-514. CSREA Press, (2004)Hardware architecture for a general regression neural network coprocessor.J. Lázaro, J. Arias, A. Astarloa, U. Bidarte, and A. Zuloaga. Neurocomputing, 71 (1-3): 78-87 (2007)PCIREX: A Fast Prototyping Platform for TMR Dynamically Reconfigurable Systems.A. Astarloa, J. Lázaro, U. Bidarte, A. Zuloaga, and J. Jimenez. ReConFig, page 54-58. IEEE Computer Society, (2009)AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications.J. Lázaro, A. Astarloa, U. Bidarte, J. Jimenez, and A. Zuloaga. ARC, volume 5453 of Lecture Notes in Computer Science, page 312-317. Springer, (2009)An automatic experimental set-up for robustness analysis of designs implemented on SRAM FPGAS.U. Kretzschmar, A. Astarloa, J. Lázaro, J. Jimenez, and A. Zuloaga. SoC, page 96-101. IEEE, (2011)SOM Segmentation of gray scale images for optical recognition.J. Lázaro, J. Arias, J. Martín, A. Zuloaga, and C. Cuadrado. Pattern Recognit. Lett., 27 (16): 1991-1997 (2006)Design of a Master Device for the Multifunction Vehicle Bus.J. Jimenez, J. Martín, U. Bidarte, A. Astarloa, and A. Zuloaga. IEEE Trans. Veh. Technol., 56 (6): 3695-3708 (2007)PRP and HSR for High Availability Networks in Power Utility Automation: A Method for Redundant Frames Discarding.J. Araujo, J. Lázaro, A. Astarloa, A. Zuloaga, and J. Garate. IEEE Trans. Smart Grid, 6 (5): 2325-2332 (2015)Malguki: an RSSI based ad hoc location algorithm.J. Arias, A. Zuloaga, J. Lázaro, J. Andreu, and A. Astarloa. Microprocess. Microsystems, 28 (8): 403-409 (2004)

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Disambiguation of "Zuloaga, Aitzol"

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A novel BRAM content accessing and processing method based on FPGA configuration bitstream.

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Disambiguation of "Zuloaga, Aitzol"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A novel BRAM content accessing and processing method based on FPGA configuration bitstream.

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A novel BRAM content accessing and processing method based on FPGA configuration bitstream.