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Automatic Compensation of the Voltage Attenuation in 3-D Interconnection Based on Capacitive Coupling., , , , , and . IEEE J. Solid State Circuits, 46 (2): 498-506 (2011)TCAD modeling of encapsulation layer in high-voltage, high-temperature operation regime., , , , , , and . ESSDERC, page 325-328. IEEE, (2014)TCAD investigation on hot-electron injection in new-generation technologies., , , , , , , , , and . Microelectron. Reliab., (2018)An embedded PCM Peripheral Unit adding Analog MAC In-Memory Computing Feature addressing Non-linearity and Time Drift Compensation., , , , , , , , and . ESSCIRC, page 109-112. IEEE, (2022)Gate stack optimization to minimize power consumption in super-lattice fets., , , , and . ESSDERC, page 81-84. IEEE, (2013)Parasitic Effects Reduction for Wafer-Level Packaging of RF-Mems, , , , , and . CoRR, (2007)A Reconfigurable Impedance Matching Network Employing RF-MEMS Switches, , , , , and . CoRR, (2008)Sensitivity Analysis for Device Design., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (5): 879-885 (1987)Numerical modeling of advanced semiconductor devices., , , , , , , , , and . IBM J. Res. Dev., 36 (2): 208-232 (1992)A design flow for inductively degenerated LNAs., , and . ICECS, page 615-618. IEEE, (2004)