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Disambiguation of "Jacobson, Hans M."

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Quantifying sources of error in McPAT and potential impacts on architectural studies.

, , , , and . HPCA, page 577-589. IEEE Computer Society, (2015)

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Michael Jacobson

Irene Jacobson

Ernst Jacobson

Anna Jacobson

Wolfgang Jacobson

 

Other publications of authors with the same name

Application-level power and performance characterization and optimization on IBM Blue Gene/Q systems., , , , and . IBM J. Res. Dev., 57 (1/2): 4 (2013)Microarchitectural techniques for power gating of execution units., , , , , and . ISLPED, page 32-37. ACM, (2004)Power-efficient, reliable microprocessor architectures: modeling and design methods., , , , , , , , , and 5 other author(s). ACM Great Lakes Symposium on VLSI, page 299-304. ACM, (2010)Corrections To application-specific Programmable Control For High-performance Asynchronous Circuits., and . Proc. IEEE, 87 (3): 525 (1999)Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors., , , , , , , , , and 1 other author(s). HPCA, page 238-242. IEEE Computer Society, (2005)Synthesis for Hazard-free Customized CMOS Complex-Gate Networks Under Multiple-Input Changes., , , and . DAC, page 77-82. ACM Press, (1996)Efficient algorithms for exact two-level hazard-free logic minimization., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (11): 1269-1283 (2002)Early-Stage Definition of LPX: A Low Power Issue-Execute Processor., , , , , , , , , and 6 other author(s). PACS, volume 2325 of Lecture Notes in Computer Science, page 1-17. Springer, (2002)SERMiner : A Framework for Early-stage Reliability Estimation for IBM Processors., , , , , and . DSN (Supplements), page 61-64. IEEE, (2021)Characterization and Exploration of Latch Checkers for Efficient RAS Protection., , , , , , , , , and . DSN-S, page 63-69. IEEE, (2023)