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The J-Machine: A Fine-Gain Concurrent Computer., , , , , , , , and . IFIP Congress, page 1147-1153. North-Holland/IFIP, (1989)A Mechanism for Efficient Context Switching., and . ICCD, page 301-304. IEEE Computer Society, (1991)The J-Machine Network., and . ICCD, page 420-423. IEEE Computer Society, (1992)The world's fastest DSP core: Breaking the 100 GMAC/s barrier., , , , , , , , , and 4 other author(s). Hot Chips Symposium, page 1-25. IEEE, (2011)The Named-State Register File: Implementation and Performance., and . HPCA, page 4-13. IEEE Computer Society, (1995)A DSP architecture optimized for wireless baseband., , and . SoC, page 151-156. IEEE, (2009)Named State and Efficient Context Switching., and . Multithreaded Computer Architecture, volume 281 of The Kluwer International Series in Engineering and Computer Science, Kluwer / Springer, (1994)