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Disambiguation of "Galton, Ian"

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A Robust Parallel Delta-Sigma A/D Converter Architecture.

, and . ISCAS, page 1340-1343. IEEE, (1995)

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Max Iann

Nadia Ianeva

Gheorghe Iancu

Enrico Iannone

Alen Ianni

 

Other publications of authors with the same name

An Efficient Three-Point Arc Algorithm. Computer Graphics and Applications, IEEE, 9 (6): 44--49 (November 1989)One-bit Dithering in Delta-Sigma Modulator-based D/A Conversion.. ISCAS, page 1310-1313. IEEE, (1993)Why Dynamic-Element-Matching DACs Work.. IEEE Trans. Circuits Syst. II Express Briefs, 57-II (2): 69-74 (2010)Simplified Logic for Tree-Structure Segmented DEM Encoders., , and . IEEE Trans. Circuits Syst. II Express Briefs, 63-II (11): 1029-1033 (2016)Correction to Ä Mostly-Digital Variable-Rate Continuous-Time Delta-Sigma Modulator ADC" Nov 10 2250-2261., and . IEEE J. Solid State Circuits, 46 (5): 1231 (2011)A Wide-Bandwidth 2.4 GHz ISM Band Fractional-N PLL With Adaptive Phase Noise Cancellation., , and . IEEE J. Solid State Circuits, 42 (12): 2639-2650 (2007)A 600-MS/s DAC With Over 87-dB SFDR and 77-dB Peak SNDR Enabled by Adaptive Cancellation of Static and Dynamic Mismatch Error., , and . IEEE J. Solid State Circuits, 54 (8): 2219-2229 (2019)Digital Background Correction of Harmonic Distortion in Pipelined ADCs., and . IEEE Trans. Circuits Syst. I Regul. Pap., 53-I (9): 1885-1895 (2006)Statistics of the Quantization Noise in 1-Bit Dithered Single-Quantizer Digital Delta-Sigma Modulators., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (3): 492-503 (2007)A wideband 2.4-GHz delta-sigma fractional-NPLL with 1-Mb/s in-loop modulation., , and . IEEE J. Solid State Circuits, 39 (1): 49-62 (2004)