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Disambiguation of "Pham, Toan"

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A 56Gb/s PAM4 wireline transceiver using a 32-way time-interleaved SAR ADC in 16nm FinFET.

, , , , , , , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2016)

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Toan Pham Van

Pham Van Toan

Toan Vu

Công-Toàn Nguyêñ

Hieu Giang-toan

 

Other publications of authors with the same name

A flow-through infusion calorimeter for measuring muscle energetics during pharmacological interventions., , , , and . I2MTC, page 1-5. IEEE, (2017)A 56-Gb/s PAM4 Wireline Transceiver Using a 32-Way Time-Interleaved SAR ADC in 16-nm FinFET., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 52 (4): 1101-1110 (2017)Determinants of US investment in real estate abroad, and . Journal of Multinational Financial Management, 10 (1): 63--72 (January 2000)An Instrument for High-throughput Testing of Heart Tissue In Vitro., , , , , , , and . EMBC, page 1-4. IEEE, (2023)Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation., , , , , , , , , and 1 other author(s). MICRO, page 7-18. IEEE Computer Society, (2003)3.3 A 0.5-to-32.75Gb/s flexible-reach wireline transceiver in 20nm CMOS., , , , , , , , , and 6 other author(s). ISSCC, page 1-3. IEEE, (2015)Reducing pipeline energy demands with local DVS and dynamic retiming., , , , , and . ISLPED, page 319-324. ACM, (2004)A Fully Adaptive 19-58-Gb/s PAM-4 and 9.5-29-Gb/s NRZ Wireline Transceiver With Configurable ADC in 16-nm FinFET., , , , , , , , , and 6 other author(s). IEEE J. Solid State Circuits, 54 (1): 18-28 (2019)On-the-fly Singular Value Decomposition for Aitken's Acceleration of the Schwarz Domain Decomposition Method., , , and . PARCO, volume 22 of Advances in Parallel Computing, page 243-250. IOS Press, (2011)A fully adaptive 19-to-56Gb/s PAM-4 wireline transceiver with a configurable ADC in 16nm FinFET., , , , , , , , , and 6 other author(s). ISSCC, page 108-110. IEEE, (2018)