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Low-Power Design for a Digit-Serial Polynomial Basis Finite Field Multiplier Using Factoring Technique.

, , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (2): 441-449 (2017)

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A Low-Variation Nonlinear Neuron Circuit., , , and . Journal of Circuits, Systems, and Computers, 8 (4): 447-451 (1998)Design of Stable 3D Recursive Digital Filters Using 3-Variable Very Strictly Hurwitz Polynomial., , , , and . Journal of Circuits, Systems, and Computers, 10 (5-6): 219-228 (2000)Extraction of objects and page segmentation of composite documents with non-uniform background., , and . ICINCO, page 344-347. INSTICC Press, (2005)High-Speed Architectures for Multiplication Using Reordered Normal Basis., , and . IEEE Trans. Computers, 61 (2): 164-172 (2012)Designing an Optimal Energy Efficient Cluster-Based Spectrum Sensing for Cognitive Radio Networks., , and . IEEE Communications Letters, 20 (9): 1884-1887 (2016)Recursive architectures for 2DLNS multiplication., , and . ISCAS, page 3869-3872. IEEE, (2010)A MEMS custom micropackaging solution., , and . ISCAS (3), page 938-941. IEEE, (2003)A MEMS implementation of an acoustical sensor array., , , and . ISCAS (2), page 273-276. IEEE, (2001)A New Motion Estimation Architecture For Block-Matching Algorithm., and . ICNSC, page 988-992. IEEE, (2008)CVNS-Based Storage and Refreshing Scheme for a Multi-Valued Dynamic Memory., , and . IEEE Trans. Very Large Scale Integr. Syst., 19 (8): 1517-1521 (2011)