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Disambiguation of "Tashiro, Yutaka"

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A Hardware/Software Concurrent Design for a Real-Time SP@ML MPEG2 Video-Encoder Chip Set.

, , , , , and . ED&TC, page 320-327. IEEE Computer Society, (1996)

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Yutaka Nojima

Annerose Tashiro

Elke Tashiro

Yutaka Hayauchi

Yutaka Nomura

 

Other publications of authors with the same name

NTT's technologies for next-generation video services., , and . Computers in Entertainment, 4 (1): 9 (2006)A 1.1 W single-chip MPEG-2 HDTV codec LSI for embedding in consumer-oriented mobile codec systems., , , , , , , , , and . CICC, page 177-180. IEEE, (2003)An Organized Firmware Verification Environment for the Programmable Image DSP., , , , and . ITC, page 1034-1041. IEEE Computer Society, (1991)Concurrent and collaborative methodologies in short TAT LSI design and manufacturing., , , , , , and . Syst. Comput. Jpn., 30 (7): 79-91 (1999)A Hardware/Software Concurrent Design for a Real-Time SP@ML MPEG2 Video-Encoder Chip Set., , , , , and . ED&TC, page 320-327. IEEE Computer Society, (1996)Two-chip MPEG-2 video encoder., , , , , , , , , and 7 other author(s). IEEE Micro, 16 (2): 51-58 (1996)SuperENC: MPEG-2 video encoder chip., , , , , , , , , and 5 other author(s). IEEE Micro, 19 (4): 56-65 (1999)A real-time motion estimation and compensation LSI with wide search range for MPEG2 video encoding., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 31 (11): 1733-1741 (1996)Architecture and implementation of a highly parallel single-chip video DSP., , , and . IEEE Trans. Circuits Syst. Video Technol., 2 (2): 207-220 (1992)Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level., , , , , , , , , and 3 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 15 (9): 1055-1059 (2007)