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Disambiguation of "Huang, Chih-Tsun"

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Area and Test Cost Reduction for On-Chip Wireless Test Channels with System-Level Design Techniques.

, , , , , and . ATS, page 245-250. IEEE Computer Society, (2008)

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Wen-chih Huang

Chih-Hong Huang

Chih-Yao Huang

Matei Chihaia

Jieh-Wen Tsung

 

Other publications of authors with the same name

Design of low-cost elliptic curve cryptographic engines for ubiquitous security., and . VLSI-DAT, page 1-4. IEEE, (2014)Design space exploration with a cycle-accurate systemC/TLM DRAM controller model., , , , , , and . VLSI-DAT, page 1-4. IEEE, (2017)Design of a scalable RSA and ECC crypto-processor., , , and . ASP-DAC, page 495-498. ACM, (2003)Tile-Based Architecture Exploration for Convolutional Accelerators in Deep Neural Networks., , , , , , and . AICAS, page 1-4. IEEE, (2021)Design and Optimization of a Pruning-Efficient DCNN Inference Accelerator., and . SoCC, page 152-157. IEEE, (2021)Design and analysis of a many-core processor architecture for multimedia applications., , , , and . APSIPA, page 1-6. IEEE, (2012)Failure Factor Based Yield Enhancement for SRAM Designs., , , , and . DFT, page 20-28. IEEE Computer Society, (2004)A BIST Scheme for FPGA Interconnect Delay Faults., , , , and . VTS, page 201-206. IEEE Computer Society, (2005)A Highly Efficient Cipher Processor for Dual-Field Elliptic Curve Cryptography., and . IEEE Trans. Circuits Syst. II Express Briefs, 56-II (5): 394-398 (2009)AC-Plus Scan Methodology for Small Delay Testing and Characterization., , , , , , , , , and 2 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 21 (2): 329-341 (2013)