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Opportunities for Analog Coding in Emerging Memory Systems., , , , , , , and . CoRR, (2017)Performance Analysis of Spiking RBM with Measurement-Based Phase Change Memory Model., , , , , , , , , and . ICONIP (5), volume 1143 of Communications in Computer and Information Science, page 591-599. Springer, (2019)Experimental Demonstration of Array-level Learning with Phase Change Synaptic Devices., , , , , , and . CoRR, (2014)7.3 A resistance-drift compensation scheme to reduce MLC PCM raw BER by over 100× for storage-class memory applications., , , , , , , , , and 3 other author(s). ISSCC, page 134-135. IEEE, (2016)A Multi-Memristive Unit-Cell Array With Diagonal Interconnects for In-Memory Computing., , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 68 (12): 3522-3526 (2021)Mushroom-Type phase change memory with projection liner: An array-level demonstration of conductance drift and noise mitigation., , , , , , , , , and 21 other author(s). IRPS, page 1-6. IEEE, (2021)Pattern Training, Inference, and Regeneration Demonstration Using On-Chip Trainable Neuromorphic Chips for Spiking Restricted Boltzmann Machine., , , , , , , , , and 3 other author(s). Adv. Intell. Syst., (2022)Endurance Evaluation on OTS-PCM Device using Constant Current Stress Scheme., , , , , , , , , and 8 other author(s). IRPS, page 7-1. IEEE, (2022)Accurate Weight Mapping in a Multi-Memristive Synaptic Unit., , , , , , , , , and . ISCAS, page 1-5. IEEE, (2021)Reliability benefits of a metallic liner in confined PCM., , , , , , , , , and 4 other author(s). IRPS, page 6. IEEE, (2018)