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Single-chip multi-processor integrating quadruple 8-way VLIW processors with interface timing analysis considering power supply noise., , , , and . ASP-DAC, page 541-546. IEEE, (2006)A Sub-µs Wake-Up Time Power Gating Technique With Bypass Power Line for Rush Current Support., , , and . IEEE J. Solid State Circuits, 44 (4): 1178-1183 (2009)Modelling wages and prices for the smaller OECD countries, , and . Working papers / OECD, Department of Economics and Statistics OECD, Paris, (1990)A Millimeter-Wave Intra-Connect Solution., , , , , , , , , and . IEEE J. Solid State Circuits, 45 (12): 2655-2666 (2010)A 12.5+12.5 Gb/s Full-Duplex Plastic Waveguide Interconnect., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 46 (12): 3113-3125 (2011)A 12.5+12.5Gb/s full-duplex plastic waveguide interconnect., , , , , , , , , and . ISSCC, page 150-152. IEEE, (2011)A versatile multi-modality serial link., , , , , , , and . ISSCC, page 332-334. IEEE, (2012)Peak power reduction of a sensor network processor fabricated with Deeply Depleted Channel transistors in 65nm technology., , , , , , and . ISQED, page 422-429. IEEE, (2013)The saving behaviour of Japanese households. Working papers / OECD Economics and Statistics Department Organisation for Economic Co-operation and Development, Paris, (1990)