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Disambiguation of "Amano, Hideharu"

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Performance Improvement Methodology for ClearSpeed's CSX600.

, , , , and . ICPP, page 77. IEEE Computer Society, (2007)

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Hideharu Umehara

Kyoko Amano

Yu Amano

Shun'ichi Amano

 

Other publications of authors with the same name

Evaluation of MuCCRA-D: A Dynamically Reconfigurable Processor with Directly Interconnected PEs., , and . ERSA, page 215-221. CSREA Press, (2008)A Routing Algorithm for DS-WDM Ring., , and . Applied Informatics, page 562-565. IASTED/ACTA Press, (1999)A Packet Forwarding Layer for DIMMnet and its Hardware Implementation., , , , , and . PDPTA, page 461-467. CSREA Press, (2005)Destination Bundle: A Routing Table Reduction Technique for Distributed Routing on Dependable Networks-on-Chips., , and . PDPTA, page 1343-1349. CSREA Press, (2005)Performance Evaluation of 3-Dimensional MIN with Cache Consistency Maintenance Mechanism., , , , , and . PDPTA, page 1148-1154. CSREA Press, (2003)Total System Image of the Reconfigurable Machine WASMII., , , , and . PDPTA, page 1092-1096. CSREA Press, (1997)A Preprocessing System of the EULASH: An Environment for Efficient use of Multiprocessors with Local Memory., , , , , and . Parallel and Distributed Computing and Systems, page 68-71. IASTED/ACTA Press, (1995)Low Latency High Bandwidth Message Transfer Mechanisms for a Network Interface Plugged into a Memory Slot., , , , , , and . Clust. Comput., 5 (1): 7-17 (2002)GenMap: A Genetic Algorithmic Approach for Optimizing Spatial Mapping of Coarse-Grained Reconfigurable Architectures., , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (11): 2383-2396 (2020)A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface., , , , , , , , , and 1 other author(s). IEEE Micro, 33 (6): 6-15 (2013)