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A novel SRAM - STT-MRAM hybrid cache implementation improving cache performance., , , , and . NANOARCH, page 39-44. IEEE, (2017)Power efficient Thermally Assisted Switching Magnetic memory based memory systems., , , , and . ReCoSoC, page 1-6. IEEE, (2014)From Spintronic Devices to Hybrid CMOS/Magnetic System On Chip., , , , , , , , , and 1 other author(s). VLSI-SoC, page 188-191. IEEE, (2018)Using multifunctional standardized stack as universal spintronic technology for IoT., , , , , , , , , and 8 other author(s). DATE, page 931-936. IEEE, (2018)A Universal Spintronic Technology based on Multifunctional Standardized Stack., , , , , , , , and . DATE, page 394-399. IEEE, (2020)Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power Microcontrollers., , , , , and . IEEE Access, (2019)Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks., , , , , , , , , and 3 other author(s). DATE, page 103-108. IEEE, (2018)Exploration of Magnetic RAM Based Memory Hierarchy for Multicore Architecture., , , , and . ISVLSI, page 248-251. IEEE Computer Society, (2014)