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Disambiguation of "Vishakantaiah, Praveen"

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Distributed Mixed Level Logic and Fault Simulation on the Pentium® Pro Microprocessor.

, , , , , , , and . ITC, page 160-166. IEEE Computer Society, (1996)

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Praveen Konidala

Paurush Praveen

Praveen Seshadri

Praveen Kulkarni

Praveen Kumar

 

Other publications of authors with the same name

Impact of Behavioral Learning on the Compilation of Sequential Circuit Tests., and . FTCS, page 370-379. IEEE Computer Society, (1993)A study of bridging defect probabilities on a Pentium (TM) 4 CPU., , and . ITC, page 688-695. IEEE Computer Society, (2001)Automatic Test Knowledge Extraction from VHDL (ATKET)., , and . DAC, page 273-278. IEEE Computer Society Press, (1992)Distributed Mixed Level Logic and Fault Simulation on the Pentium® Pro Microprocessor., , , , , , , and . ITC, page 160-166. IEEE Computer Society, (1996)TRANSPARENT: a system for RTL testability analysis, DFT guidance and hierarchical test generation., , , and . CICC, page 159-162. IEEE, (1999)Transparency-based hierarchical test generation for modular RTL designs., , , and . ISCAS, page 689-692. IEEE, (2000)AMBIANT: Automatic Generation of Behavioral Modifications for Testability., , , and . ICCD, page 63-66. IEEE Computer Society, (1993)Modular test generation and concurrent transparency-based test translation using gate-level ATPG., , and . CICC, page 75-78. IEEE, (2000)DPDAT: data path direct access testing., , , , , and . ITC, page 188-195. IEEE Computer Society, (2001)Generation of testable designs from behavioral descriptions using high level synthesis tools., , and . VTS, page 124-130. IEEE Computer Society, (1993)