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Disambiguation of "Collet, Jacques Henri"

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Chip Self-Organization and Fault Tolerance in Massively Defective Multicore Arrays.

, , , and . IEEE Trans. Dependable Secur. Comput., 8 (2): 207-217 (2011)

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Jacques-Henri Jourdan

Jacques-Henri Sublemontier

Catharina Collet

Ekart Collet

Giancarlo Collet

 

Other publications of authors with the same name

Mitigating Soft Errors to Prevent a Hard Threat to Dependable Computing., , and . IOLTS, page 295-298. IEEE Computer Society, (2005)A brief overview of the challenges of the multicore roadmap.. MIXDES, page 22-29. IEEE, (2014)Resilience, Production Yield and Self-Configuration in the Future Massively Defective Nanochips., and . IOLTS, page 259. IEEE Computer Society, (2007)ROBUST: a new self-healing fault-tolerant NoC router., , , and . NoCArc@MICRO, page 11-16. ACM, (2011)Optical versus Electronic Bus for Address-Transactions in Future SMP Architectures., , , and . IEEE PACT, page 22-29. IEEE Computer Society, (1998)Production Yield and Self-Configuration in the Future Massively Defective Nanochips., and . DFT, page 197-205. IEEE Computer Society, (2007)Implementing Snoop-Coherence Protocol for Future SMP Architectures., , and . Euro-Par, volume 1685 of Lecture Notes in Computer Science, page 745-752. Springer, (1999)Chip Self-Organization and Fault Tolerance in Massively Defective Multicore Arrays., , , and . IEEE Trans. Dependable Secur. Comput., 8 (2): 207-217 (2011)Order-disorder alternations in the populations of faulty repulsive agents. Physica A: Statistical Mechanics and its Applications, 386 (1): 345--364 (Dec 1, 2007)Limit of Hardware Solutions for Self-Protecting Fault-Tolerant NoCs., , and . ACM J. Emerg. Technol. Comput. Syst., 15 (1): 4:1-4:16 (2019)