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Disambiguation of "Asada, Kunihiro"

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Extension of power supply impedance emulation method on ATE for multiple power domain.

, , , , , , and . ETS, page 1-2. IEEE, (2017)

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Kunihiro Jojima

 

Other publications of authors with the same name

A Gate Delay Mismatch Tolerant Time-Mode Analog Accumulator Using a Delay Line Ring., , , and . IEICE Trans. Electron., 100-C (9): 736-745 (2017)Feedforward Active Substrate Noise Cancelling Based on di/dt of Power Supply., , and . IEICE Trans. Electron., 89-C (3): 364-369 (2006)A CMOS Broadband Transceiver with On-Chip Antenna Array and Built-In Pulse-Delay Calibration for Millimeter-Wave Imaging Applications., and . IEICE Trans. Electron., 100-C (12): 1078-1086 (2017)Autonomous di/dt Control of Power Supply for Margin Aware Operation., , and . IEICE Trans. Electron., 89-C (11): 1689-1694 (2006)Cascaded Time Difference Amplifier with Differential Logic Delay Cell., , , , and . IEICE Trans. Electron., 94-C (4): 654-662 (2011)All-Digital On-Chip Monitor for PMOS and NMOS Process Variability Utilizing Buffer Ring with Pulse Counter., , , , and . IEICE Trans. Electron., 94-C (4): 487-494 (2011)Exact Minimum-Width Transistor Placement for Dual and Non-dual CMOS Cells., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 88-A (12): 3485-3491 (2005)A 0.25-µm Si-Ge Fully Integrated Pulse Transmitter with On-Chip Loop Antenna Array towards Beam-Formability for Millimeter-Wave Active Imaging., , and . IEICE Trans. Electron., 94-C (10): 1626-1633 (2011)A 65 nm Gate-Level Pipelined Self-Synchronous FPGA for High Performance and Variation Robust Operation., , and . IEEE J. Solid State Circuits, 46 (11): 2500-2513 (2011)High-resolution measurement of magnetic field generated from cryptographic LSIs., , , , , and . SAS, page 111-114. IEEE, (2014)