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Disambiguation of "Bashirullah, Rizwan"

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A 10 V Fully-Integrated Switched-Mode Step-up Piezo Drive Stage in 0.13µm CMOS Using Nested-Bootstrapped Switch Cells.

, , , , , , and . IEEE J. Solid State Circuits, 51 (6): 1475-1486 (2016)

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Rizwan Ahmed

Rizwan Mumtaz

Rizwan Ali

Rizwan Asghar

Syed Ali Rizwan

 

Other publications of authors with the same name

An optimal design methodology for inductive power link with class-E amplifier., , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (5): 857-866 (2005)A synthesizable time-based LDO using digital standard cells and analog pass transistor., , , , , and . ESSCIRC, page 271-274. IEEE, (2017)A 4.7 T/11.1 T NMR Compliant 50 nW Wirelessly Programmable Implant for Bioartificial Pancreas In Vivo Monitoring., and . IEEE J. Solid State Circuits, 51 (2): 473-483 (2016)Low-power design methodology for an on-chip bus with adaptive bandwidth capability., , and . DAC, page 628-633. ACM, (2003)A 0.45V CMOS relaxation oscillator with ±2.5% frequency stability from -55°C to 125°C., , and . ISCAS, page 493-496. IEEE, (2015)A 4.7T/11.1T NMR compliant wirelessly programmable implant for bio-artificial pancreas in vivo monitoring., and . VLSIC, page 1-2. IEEE, (2014)A 12.4-mW 4.5-Gb/s Receiver With Majority-Voting 1-Tap Speculative DFE in 0.13- µm CMOS., and . IEEE Trans. Circuits Syst. II Express Briefs, 60-II (12): 867-871 (2013)Simplified delay design guidelines for on-chip global interconnects., , , , and . ACM Great Lakes Symposium on VLSI, page 29-32. ACM, (2004)Delay and power model for current-mode signaling in deep submicron global interconnects., , and . CICC, page 513-516. IEEE, (2002)A 10 V Fully-Integrated Switched-Mode Step-up Piezo Drive Stage in 0.13µm CMOS Using Nested-Bootstrapped Switch Cells., , , , , , and . IEEE J. Solid State Circuits, 51 (6): 1475-1486 (2016)