( en | de | ru )

 

Disambiguation of "Karner, Markus"

Author of the publication

copydeleteadd this publication to your clipboard
Interface traps density-of-states as a vital component for hot-carrier degradation modeling.

, , , , , , , , , , , , , and . Microelectron. Reliab., 50 (9-11): 1267-1272 (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Norbert Karner

Peter Karner

Jürgen Karner

Wilhelm Karner

Hermann Kärner

 

Other publications of authors with the same name

VSP - A gate stack analyzer., , , , , , , , , and . Microelectron. Reliab., 47 (4-5): 704-708 (2007)Cell Designer - a Comprehensive TCAD-Based Framework for DTCO of Standard Logic Cells., , , , , , and . ESSDERC, page 202-205. IEEE, (2018)Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies., , , , , , , , , and 10 other author(s). IRPS, page 1-6. IEEE, (2021)1.5-nm Node Surrounding Gate Transistor (SGT)-SRAM Cell with Staggered Pillar and Self-Aligned Process for Gate, Bottom Contact, and Pillar., , , , , , , , , and 1 other author(s). IMW, page 1-4. IEEE, (2021)A TCAD Compatible SONOS Trapping Layer Model for Accurate Programming Dynamics., , , , , , , , and . IMW, page 1-4. IEEE, (2021)A Study of the Variability and Design Considerations of Ferroelectric VNAND Memories With Polycrystalline Films Using An Experimentally Validated TCAD Model., , , , and . ESSDERC, page 77-80. IEEE, (2023)Interface traps density-of-states as a vital component for hot-carrier degradation modeling., , , , , , , , , and 4 other author(s). Microelectron. Reliab., 50 (9-11): 1267-1272 (2010)A Novel Approach to Modeling Insulator Wave-Function Penetration and Interface Roughness Scattering in MOSFETs., , , and . ESSDERC, page 273-276. IEEE, (2022)Predictive physical simulation of III/V quantum-well MISFETs for logic applications., , , , , , and . ESSDERC, page 310-313. IEEE, (2015)nnU-Net Pre- and Postprocessing Strategies for UW-OCTA Segmentation Tasks in Diabetic Retinopathy Analysis., , , , and . MIDOG/DRAC@MICCAI, volume 13597 of Lecture Notes in Computer Science, page 5-15. Springer, (2022)