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Hardware requirements for neural network pattern classifiers: a case study and implementation., , , , and . IEEE Micro, 12 (1): 32-40 (1992)Digital Domain Measurement and Cancellation of Residue Amplifier Nonlinearity in Pipelined ADCs., and . IEEE Trans. Instrumentation and Measurement, 56 (6): 2504-2514 (2007)A 256-element CMOS imaging receiver for free-space optical communication., , and . CICC, page 303-306. IEEE, (2004)Rodent wearable ultrasound system for wireless neural recording., , , and . EMBC, page 221-225. IEEE, (2017)A CMOS 10kpixel baseline-free magnetic bead detector with column-parallel readout for miniaturized immunoassays., , , , , , and . ISSCC, page 126-128. IEEE, (2012)Editorial.. IEEE J. Solid State Circuits, 36 (8): 1167 (2001)A three-axis micromachined accelerometer with a CMOS position-sense interface and digital offset-trim electronics., and . IEEE J. Solid State Circuits, 34 (4): 456-468 (1999)Handwritten digit recognition: applications of neural network chips and automatic learning., , , , , , , , and . IEEE Commun. Mag., 27 (11): 41-46 (1989)12.1 3D ultrasonic gesture recognition., , , , and . ISSCC, page 210-211. IEEE, (2014)11.2 3D ultrasonic fingerprint sensor-on-a-chip., , , , , , , , , and 2 other author(s). ISSCC, page 202-203. IEEE, (2016)