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A Continuous-Time Hexagonal Field-Programmable Analog Array in 0.13μm CMOS with 186MHz GBW., , , , and . ISSCC, page 70-71. IEEE, (2008)Fundamental limits of jitter insensitivity in discrete and continuous-time sigma delta modulators., , and . ISCAS (1), page 1037-1040. IEEE, (2003)Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT Sigma Delta modulators., , and . ISCAS (1), page 1076-1079. IEEE, (2004)A hexagonal Field Programmable Analog Array consisting of 55 digitally tunable OTAs., , , , and . ISCAS, page 2897-2900. IEEE, (2008)Multirate cascaded continuous time Sigma-Delta modulators., , , and . ISCAS (4), page 225-228. IEEE, (2002)A hybrid comparator for high resolution SAR ADC., , and . ISCAS, page 1050-1053. IEEE, (2016)Modular PUF Coding Chain with High-Speed Reed-Muller Decoder., , , , , , and . ISCAS, page 1-5. IEEE, (2019)An array of fully-integrated quadrature TX/RX NMR field probes for MRI trajectory mapping., , , , , , , and . ESSCIRC, page 217-220. IEEE, (2016)A clock jitter insensitive multibit DAC architecture for high-performance low-power continuous-time ΣΔ modulators., , , , and . ICECS, page 958-961. IEEE, (2003)Distributed clock gating for power reduction of a programmable waveform generator for neural stimulation., , , , and . EMBC, page 3878-3881. IEEE, (2012)