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Integrated parallel interleaved concatenation for lowering error floors of LDPC codes., and . ISIT, page 3013-3017. IEEE, (2016)Design and Performance of Rate-Compatible Non-binary LDPC Convolutional Codes., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 94-A (11): 2135-2143 (2011)Threshold Improvement of Low-Density Lattice Codes via Spatial Coupling, , , and . CoRR, (2011)Joint BCH and XOR Decoding for Solid State Drives., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 106 (10): 1322-1329 (October 2023)Circuit-Size Reduction for Parallel Chien Search using Minimal Polynomial Degree Reduction., , , and . ISCAS, page 1-5. IEEE, (2019)Complexity-Reducing Algorithm for Serial Scheduled Min-Sum Decoding of LDPC Codes., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 92-A (10): 2411-2417 (2009)Terminated LDPC convolutional codes over GF(2p)., , and . Allerton, page 195-200. IEEE, (2010)Threshold improvement of low-density lattice codes via spatial coupling., , , and . ICNC, page 1036-1040. IEEE Computer Society, (2012)Iterative encoding with Gauss-Seidel method for spatially-coupled low-density lattice codes., , , and . ISIT, page 1737-1741. IEEE, (2012)Design of non-precoded protograph-based LDPC codes.. ISIT, page 2779-2783. IEEE, (2014)