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Disambiguation of "Reorda, Matteo Sonza"

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On-Line Detection of Control-Flow Errors in SoCs by Means of an Infrastructure IP Core.

, , , , , and . DSN, page 50-58. IEEE Computer Society, (2005)

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Matteo Garavoglia

Matteo Bertini

Matteo Rini

Marco Matteo

Matteo Gabba

 

Other publications of authors with the same name

An experimental analysis of the effectiveness of the circular self-test path technique., , and . EURO-DAC, page 246-251. IEEE Computer Society, (1994)Evaluating Different Solutions to Design Fault Tolerant Systems with SRAM-based FPGAs., , , , and . J. Electron. Test., 23 (1): 47-54 (2007)GATTO: a genetic algorithm for automatic test pattern generation for large synchronous sequential circuits., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (8): 991-1000 (1996)System-level test bench generation in a co-design framework., , , , and . ETW, page 25-30. IEEE Computer Society, (2000)DYRE: a DYnamic REconfigurable solution to increase GPGPU's reliability., , , and . J. Supercomput., 77 (10): 11625-11642 (2021)Exploiting an infrastructure-intellectual property for systems-on-chip test, diagnosis and silicon debug., , , and . IET Comput. Digit. Tech., 4 (2): 104-113 (2010)A Functional Approach for Testing the Reorder Buffer Memory., , , and . J. Electron. Test., 30 (4): 469-481 (2014)Software-Based Testing for System Peripherals., , , , , and . J. Electron. Test., 28 (2): 189-200 (2012)A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits., , , , , and . J. Electron. Test., 33 (1): 25-36 (2017)Microprocessor Testing: Functional Meets Structural Test., , , , , and . J. Circuits Syst. Comput., 26 (8): 1740007:1-1740007:18 (2017)