Author of the publication

A preprocessor for improving channel routing hierarchical pin permutation.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (7): 896-903 (1995)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Partitionable multistage interconnection networks. Part 1: Dynamic subcube compaction., , and . Telecommun. Syst., 10 (1): 79-106 (1998)A preprocessor for improving channel routing hierarchical pin permutation., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (7): 896-903 (1995)Methodologies for Designing Video Servers., , and . IEEE Trans. Multim., 2 (1): 62-69 (2000)Optimal Routing Algorithm and the Diameter of the Cube-Connected Cycles., and . IEEE Trans. Parallel Distributed Syst., 4 (10): 1172-1178 (1993)A heuristic for data path synthesis using multiport memories., and . Great Lakes Symposium on VLSI, page 44-51. IEEE, (1992)Permutation Capability of Multistage Interconnection Networks., and . ICPP (1), page 338-346. Pennsylvania State University Press, (1990)Communication Aspects of the Cube Connected Cycles., and . ICPP (1), page 579-580. Pennsylvania State University Press, (1990)Synthesis of Asynchronous Circuits - Testing Unique Circuit Behavior of Signal Transition Graphs., and . ISCAS, page 1074-1077. IEEE, (1995)A sensitivity based placer for standard cells., , and . ACM Great Lakes Symposium on VLSI, page 193-196. ACM, (2000)A novel technique for sea of gates global routing., , and . ACM Great Lakes Symposium on VLSI, page 71-74. ACM, (2000)