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A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution.

K. Sohn, W. Yun, R. Oh, C. Oh, S. Seo, M. Park, D. Shin, W. Jung, S. Shin, J. Ryu, H. Yu, J. Jung, H. Lee, S. Kang, Y. Sohn, J. Choi, Y. Bae, S. Jang, and G. Jin. IEEE J. Solid State Circuits, 52 (1): 250-260 (2017)

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Ki-Chang Seong

Seunghyeon Seong

Nak-Hyon Seong

Hong-Jae Seong

Seo Young Cho

Other publications of authors with the same name

1.2V 1.6Gb/s 56nm 6F2 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture.Y. Moon, Y. Cho, H. Lee, B. Jeong, S. Hyun, B. Kim, I. Jeong, S. Seo, J. Shin, S. Choi and 5 other author(s). ISSCC, page 128-129. IEEE, (2009)MS aided MBS enhancement algorithm.S. Seo, S. Kim, and Y. Kim. ICTC, page 101-102. IEEE, (2010)An all-digital PLL with supply insensitive digitally controlled oscillator.S. Seo, J. Chun, Y. Jun, and K. Kwon. IEICE Electron. Express, 10 (5): 20120902 (2013)A Digitally Controlled Oscillator With Wide Frequency Range and Low Supply Sensitivity.S. Seo, J. Chun, Y. Jun, S. Kim, and K. Kwon. IEEE Trans. Circuits Syst. II Express Briefs, 58-II (10): 632-636 (2011)A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution.K. Sohn, W. Yun, R. Oh, C. Oh, S. Seo, M. Park, D. Shin, W. Jung, S. Shin, J. Ryu and 9 other author(s). IEEE J. Solid State Circuits, 52 (1): 250-260 (2017)18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution.K. Sohn, W. Yun, R. Oh, C. Oh, S. Seo, M. Park, D. Shin, W. Jung, S. Shin, J. Ryu and 11 other author(s). ISSCC, page 316-317. IEEE, (2016)3D image transmission technology for mobile IPTV.Y. Kim, G. Khishigjargal, S. Song, Y. Lee, P. Geun, C. Sim, P. Soo, Y. Chung, C. Cho, W. Ryu and 3 other author(s). ICTC, page 280-283. IEEE, (2010)

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Disambiguation of "Seo, Seong-Young"

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A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution.

Please choose a person to relate this publication to

Ki-Chang Seong

Seunghyeon Seong

Nak-Hyon Seong

Hong-Jae Seong

Seo Young Cho

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Seo, Seong-Young"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution.

Please choose a person to relate this publication to

Ki-Chang Seong

Seunghyeon Seong

Nak-Hyon Seong

Hong-Jae Seong

Seo Young Cho

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution.