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Three-dimensional integration technology and integrated systems., , and . ASP-DAC, page 409-415. IEEE, (2009)Growth Optimization of Multi-Layer Graphene for Thermal-TSV Application in 3D-LSI., , and . 3DIC, page 1-5. IEEE, (2019)Self-Assembly of Chip-Size Components with Cavity Structures: High-Precision Alignment and Direct Bonding without Thermal Compression for Hetero Integration., , , , , , , , , and . Micromachines, 2 (1): 49-68 (2011)A block-parallel ADC with digital noise cancelling for 3-D stacked CMOS image sensor., , , , , , and . 3DIC, page 1-4. IEEE, (2013)Effect of CVD Mn oxide layer as Cu diffusion barrier for TSV., , , , , , , , and . 3DIC, page 1-4. IEEE, (2013)Impact of 3-D integration process on memory retention characteristics in thinned DRAM chip for 3-D memory., , , , , , , and . 3DIC, page 1-4. IEEE, (2013)Temporary bonding strength control for self-assembly-based 3D integration., , , , , , and . 3DIC, page 1-4. IEEE, (2011)A very low area ADC for 3-D stacked CMOS image processing system., , , , , , and . 3DIC, page 1-4. IEEE, (2011)Implementation of Light and Dark Adaptation Function for High QOL 3D-Stacked Artificial Retina Chip., , , , , , , , , and . BioCAS, page 519-523. IEEE, (2022)An empirical study of just-in-time defect prediction using cross-project models., , , , and . MSR, page 172-181. ACM, (2014)