Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Evolutionary Approach to Test Generation for Functional BIST, , , , and . CoRR, (2010)From RTL Liveness Assertions to Cost-Effective Hardware Checkers., , , and . DCIS, page 1-6. IEEE, (2018)Overview of Fault Tolerant Techniques in Underwater Sensor Networks., , and . CoRR, (2019)Hierarchical Identification of Untestable Faults in Sequential Circuits., , , and . DSD, page 668-671. IEEE Computer Society, (2007)Fault Diagnosis in Integrated Circuits with BIST., , , , and . DSD, page 604-610. IEEE Computer Society, (2007)Parallel X-fault simulation with critical path tracing technique., , , and . DATE, page 879-884. IEEE Computer Society, (2010)Automated design error debug using high-level decision diagrams and mutation operators., , , , , and . Microprocess. Microsystems, 37 (4-5): 505-513 (2013)PSL Assertion Checking Using Temporally Extended High-Level Decision Diagrams., , , and . J. Electron. Test., 25 (6): 289-300 (2009)Automated Design Error Localization in RTL Designs., , , , , , , , and . IEEE Des. Test, 31 (1): 83-92 (2014)Hybrid Protection of Digital FIR Filters., , , , , , and . CoRR, (2023)