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Disambiguation of "Vargas, Fabian"

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Rejuvenation of nanoscale logic at NBTI-critical paths using evolutionary TPG.

, , , , , , , , , , and . LATS, page 1-6. IEEE Computer Society, (2015)

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Gilberto Vargas

Ortrud Vargas

Carolyn Vargas

Ariel Vargas

Alejandro Vargas

 

Other publications of authors with the same name

Time Management for Low-Power Design of Digital Systems., , , , , , and . J. Low Power Electron., 4 (3): 410-419 (2008)PCoSA: A product error correction code for use in memory devices targeting space applications., , , , , , and . Integr., (2020)Bits, Flips and RISCs., , , , , , , , , and 3 other author(s). DDECS, page 140-149. IEEE, (2023)Recent Improvements on the Specification of Transient-Fault Tolerant VHDL Descriptions: A Case-Study for Area Overhead Analysis., and . SBCCI, page 249-254. IEEE Computer Society, (2000)An Extensible Code for Correcting Multiple Cell Upset in Memory Arrays., , , , , and . J. Electron. Test., 34 (4): 417-433 (2018)Guest Editorial., and . J. Electron. Test., 20 (4): 331-332 (2004)Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip., , , , , and . J. Electron. Test., 21 (4): 349-363 (2005)Evaluating the Effectiveness of a Software-Based Technique Under SEEs Using FPGA-Based Fault Injection Approach., , , , , , , , and . J. Electron. Test., 28 (6): 777-789 (2012)12th "IEEE Latin-American Test Workshop" Porto de Galinhas, Brazil, 27-30 March 2011., , , , and . J. Low Power Electron., 7 (4): 529-530 (2011)Lower VDD Operation of FPGA-Based Digital Circuits Through Delay Modeling and Time Borrowing., , , , , , , , and . J. Low Power Electron., 7 (2): 185-198 (2011)