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Synthesis of partition-codec architecture for low power and small area circuit design.

S. Ruan, J. Lin, P. Chen, K. Tsai, and F. Lai. ISCAS (5), page 523-526. IEEE, (2001)

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Po-Ting Chen

Yu-Chen Hung

Hung-Kwan Chen

Chen-Far Hung

Chih-Hung Chen

Other publications of authors with the same name

20.10 A 50nW-to-10mW output power tri-mode digital buck converter with self-tracking zero current detection for photovoltaic energy harvesting.P. Chen, C. Wu, and K. Lin. ISSCC, page 1-3. IEEE, (2015)A single-inductor dual-input dual-output (SIDIDO) power management with sequential pulse-skip modulation for battery/PV hybrid systems.H. Lee, and P. Chen. A-SSCC, page 293-296. IEEE, (2016)A single-inductor triple-input-triple-output (SITITO) energy harvesting interface with cycle-by-cycle source tracking and adaptive peak-inductor-current control.C. Liu, M. Chung, H. Lee, P. Liao, and P. Chen. A-SSCC, page 113-116. IEEE, (2017)Mean Holding Time in Sync of Lossy IEEE 802.15.4e TSCH Networks for Industrial IOT Applications.H. Wu, K. Ke, P. Chen, C. Lin, and M. Chen. ICCCN, page 1-2. IEEE, (2017)Complete and fragmented replica selection and retrieval in Data Grids.R. Chang, and P. Chen. Future Gener. Comput. Syst., 23 (4): 536-546 (2007)Markov model fuzzy-reasoning based algorithm for fast block motion estimation.P. Chen, H. Chen, K. Hung, W. Fang, M. Shie, and F. Lai. J. Vis. Commun. Image Represent., 17 (1): 131-142 (2006)An Integrated CMOS Front-End Receiver with a Frequency Tripler for V-Band Applications.P. Chen, M. Chen, C. Ko, and C. Wu. IEICE Trans. Electron., 93-C (6): 877-883 (2010)A 69.3% Efficiency, 6.78-MHz Wireless Power Delivery System with 0X/1X Regulating Rectifier and Reconfigurable Power Amplifier.J. Fuh, F. Yang, and P. Chen. A-SSCC, page 37-38. IEEE, (2019)0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS.Y. Okuma, K. Ishida, Y. Ryu, X. Zhang, P. Chen, K. Watanabe, M. Takamiya, and T. Sakurai. IEICE Trans. Electron., 94-C (6): 938-944 (2011)Application of Evolutionary Neural Network to Power System Unit Commitment.P. Chen, and H. Chen. ISNN (2), volume 3972 of Lecture Notes in Computer Science, page 1296-1303. Springer, (2006)

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Disambiguation of "Chen, Po-Hung"

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Synthesis of partition-codec architecture for low power and small area circuit design.

Please choose a person to relate this publication to

Po-Ting Chen

Yu-Chen Hung

Hung-Kwan Chen

Chen-Far Hung

Chih-Hung Chen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chen, Po-Hung"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Synthesis of partition-codec architecture for low power and small area circuit design.

Please choose a person to relate this publication to

Po-Ting Chen

Yu-Chen Hung

Hung-Kwan Chen

Chen-Far Hung

Chih-Hung Chen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Synthesis of partition-codec architecture for low power and small area circuit design.