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A 0.6 V Input CCM/DCM Operating Digital Buck Converter in 40 nm CMOS.

, , , , , , , and . IEEE J. Solid State Circuits, 49 (11): 2377-2386 (2014)

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A Variable Output Voltage Switched-Capacitor DC-DC Converter with Pulse Density and Width Modulation (PDWM) for 57% Ripple Reduction at Low Output Voltage., , , , , , , and . IEICE Trans. Electron., 94-C (6): 953-959 (2011)A low voltage buck DC-DC converter using on-chip gate boost technique in 40nm CMOS., , , , , , , and . ASP-DAC, page 109-110. IEEE, (2013)0.5-V input digital LDO with 98.7% current efficiency and 2.7-µA quiescent current in 65nm CMOS., , , , , , , and . CICC, page 1-4. IEEE, (2010)A 95mV-startup step-up converter with Vth-tuned oscillator by fixed-charge programming and capacitor pass-on scheme., , , , , , , , and . ISSCC, page 216-218. IEEE, (2011)A 80-mV input, fast startup dual-mode boost converter with charge-pumped pulse generator for energy harvesting., , , , , , and . A-SSCC, page 33-36. IEEE, (2011)A 1-V-Input Switched-Capacitor Voltage Converter With Voltage-Reference-Free Pulse-Density Modulation., , , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 59-II (6): 361-365 (2012)A 0.6 V Input CCM/DCM Operating Digital Buck Converter in 40 nm CMOS., , , , , , , and . IEEE J. Solid State Circuits, 49 (11): 2377-2386 (2014)0.18-V input charge pump with forward body biasing in startup circuit using 65nm CMOS., , , , , , and . CICC, page 1-4. IEEE, (2010)0.18-V Input Charge Pump with Forward Body Bias to Startup Boost Converter for Energy Harvesting Applications., , , , , , and . IEICE Trans. Electron., 94-C (4): 598-604 (2011)0.5-V Input Digital Low-Dropout Regulator (LDO) with 98.7% Current Efficiency in 65 nm CMOS., , , , , , , and . IEICE Trans. Electron., 94-C (6): 938-944 (2011)